data sheet NL10276AC24-05 tft color lcd module document no. en0208ej2v0ds00 date published april 1997 m printed in japan 1996 description NL10276AC24-05 is a tft (thin film transistor) active matrix color liquid crystal display (lcd) comprising amorphous silicon tft attached to each signal electrode, a driving circuit and a backlight. NL10276AC24-05 has a built-in backlight/inverter. the 31cm diagonal display area contains 1024 768 pixels and can display full-color (more than 16 million colors) simultaneously by analog rgb signals of xga, svga, vga, vga-text, pc-9801, ntsc, and pal. NL10276AC24-05 is a succeeding model for nl10276ac24-02, and it has two additional operating modes of ntsc and pal. features a analog rgb interface a vertical screen expansion (multi-scan)~xga, svga, vga, vga-text, pc-9801, ntsc, pal. a high luminous / low reflection a incorporated edge-light type backlight with inverter. applications a engineering workstation (ews), personal computer (pc), word processor a display terminals for control system a new media a monitors for process controller 31cm (12.1 type), 1024 768 pixels, full color vertical screen expansion (multi-scan), incorporated backlight with inverter the information in this document is subject to change without notice.
2 NL10276AC24-05 structure and functions a tft color lcd module comprises a tft lcd panel, lsis for driving liquid crystal, and a backlight. the tft lcd panel is composed of a tft array glass substrate superimposed on a color filter glass substrate with liquid crystal filled in the narrow gap between two substrates. the backlight apparatus is located on the backside of the lcd panel. rgb (red, green, blue) data signals are sent to lcd panel drivers after modulation into suitable forms for active matrix addressing through signal processor. each of the liquid crystal cells acts as an electro-optical switch that controls the light transmission from the backlight by a signal applied to a signal electrode through the tft switch. block diagram i/f aif r
g
b vsync
hsync
clk lcd timing
controller de
desel
clamp
cpsel
field analog
h-driver cntdat
cntclk
cntstb
cntsel tft-lcd panel h:1024 3 (r, g, b)
v:768 inverter v ddb
gndb *
brtc
brth
brtl
aca 768
lines analog
h-driver 1536 lines 1536 lines dc / dc
converter on off v cc
v dd
gnd
powc lcd module amp backlight v - driver * 1 : gndb is connected to the module frame ground.
3 NL10276AC24-05 outline of characteristics (at room temperature) display area 245.76 (h) 184.32 (v)mm drive system a-si tft active matrix display colors full-color number of pixels 1024 768 pixel arrangement rgb vertical stripe pixel pitch 0.24 (h) 0.24 (v)mm module size 290 (h) 225.0 (v) 17.0 max. (d)mm weight 970 g (typ.) contrast ratio 150:1 (typ.) viewing angle (more than the contrast ratio of 10:1) ? horizontal: 50? (typ. left side, right side) ? vertical : 20? (typ. upper side), 20? (typ. lower side) designed viewing direction ? wider viewing angle with contrast ratio : down side (6 o'clock) ? wider viewing angle without image reversal : up side (12 o'clock) ? optimum grayscale ( g = 2.2) : perpendicular color gamut 40% (min., at center, to ntsc) response time 40 ms (max.), "white" to "black" luminance 200 cd/m 2 (typ.) signal system analog rgb signals, synchronous signals (hsync, vsync), dot clock supply voltage 3.3 v, 12 v, 12 v backlight edge light type, two cold cathode fluorescent lamps with inverter power consumption 14.4 w (typ.)
4 NL10276AC24-05 item specifications unit module size 290.0 0.5(h) 225.0 0.5(v) 17.0 max. (d) mm display area 245.76(h) 184.32 (v) mm number of pixels 1024(h) 768 (v) pixel dot pitch 0.08(h) 0.24 (v) mm pixel pitch 0.24(h) 0.24 (v) mm pixel arrangement rgb(red, green, blue) vertical stripe C display colors full-color color weight 1000 (max.) g general specifications note : a variable resistor for the luminance control is extra. absolute maximum ratings parameter symbol ratings unit remarks v cc C0.3 to +4.6 v supply voltage v dd C0.3 to +14 v v ddb C0.3 to +14 v logic input voltage vin1 C0.3 to +5.5 v r, g, b input voltage vin2 C4.0 to +4.0 v clk input voltage vin3 C7.0 to +7.0 v storage temp. tst C20 to +60 ? c C operating temp. top 0 to +50 ? c module surface * humidity 95% relative humidity ta = 40?c 85% relative humidity 40?c 50?c ta = 50?c, 85% relative humidity level. ta = 25?c no condensa- tion * measured at the display area < = < = < = < =
5 NL10276AC24-05 parameter symbol min. typ. max. unit remarks v cc 3.0 3.3 3.6 v for logic supply voltage v dd 11.4 12.0 12.6 v for lcd driving v ddb 11.4 12.0 12.6 v for backlight logic input "l" voltage v il 0 C 0.8 v logic input "h" voltage v ih 2.2 C 5.25 v logic input "l" current 1 i il1 C1080 C C m a logic input "h" current 1 i ih1 CC10 m a logic input "l" current 2 i il2 C670 C C m a logic input "h" current 2 i ih2 CC80 m a logic input "l" current 3 i il3 C90 C C m a logic input "h" current 3 i ih3 CC0 m a logic input "l" current 4 i il4 C10 C C m a logic input "h" current 4 i ih4 C C 130 m a clk input voltage v iclk 0.4 C 1.0 vp-p clk dc input level v idc -clk C4.5 C +4.5 v supply current i ddb C 710 800 ma v ddb = 12 v i dd C 480 700 ma v dd = 12 v i cc C 120 200 ma v cc = 3.3 v electrical characteristics (1) logic/lcd driving/backlight ta = 25?c ttl level vcc=3.3 v for cntsel, cpsel and powc terminals for brtc terminal for aca terminal except the above logic input terminals for clk 1 000 pf 510 w clk clk input equivalent circuit (2) input video signals (r, g, b) ta = 25?c parameter symbol min. typ. max. unit remarks video input voltages v irgb 0 C 0.7 vp-p video input limits v idc -rgb C2.5 C +2.5 v for rgb zi = 75 w * 1 : ta = 0 to 50?c : v iclk = 0.6 v p-p (min.). ta = 25?c : v iclk = 0.4 v p-p (min.). * 2 : dot-checkered pattern * 1 * 2 * 2 * 2 (black) (white)
6 NL10276AC24-05 supply voltage sequence voltage v ddb powc v dd v cc time logic signals (synchronous signals, control signals) 0< 0< 0< 0< caution wrong power sequence may damage to the module. (1) logic signals (synchronous signals and control signals) should be "0" voltage (v), when v cc is not input. if higher than 0.3 v is input to signal lines, the internal circuit will be damaged. (2) lcd module will shut down the power supply of driving voltage to lcd panel internally, when one of clk, hsync, vsync, de (at de mode) is not input more than 90 ms typically. during this period, the display data are unstable. but the backlight works correctly even this period, and the backlight can be controlled by brtc signal. (3) the on/off switching of backlight should operate while logic signals are supplied. if the backlight power supply (v ddb ) is turned on / off without logic signals, unstable data will be displayed. (4) keep powc signal "l" more than 200 ms after the power supply (v cc ) is input, if powc signal is controlled. (refer to pin function) (5) analog rgb inputs are independent from this power supply sequence. (6) it is better for the timing between logic signals and v cc as follows. v cc logic signals 0 7 NL10276AC24-05 interface pin connection (1) connector 1 cn1 : mrf03-6r-smt (coaxial type) adaptable socket : mrf03-2 6p-1.27 (for cable type) or mrf03-6pr-smt (for board to board type) supplier : hirose electric co., ltd. coaxial cable : ul20537pf75vlas supplier : hitachi co., ltd. note : a coaxial cable shield should be connected with gnd. (2) connector 2 cn2 : il-z-12pl1-smty adaptable socket : il-z-12s-s125c3 supplier : japan aviation electronics industry limited (jae) (3) connector 3 cn3 : il-z-11pl1-smty adaptable socket : il-z-11s-s125c3 supplier : japan aviation electronics industry limited (jae) pin no. symbol pin no. symbol 1 clk 4 r 2 hsync 5 g 3 vsync 6 b pin no. symbol pin no. symbol 1v dd 7v cc 2v dd 8v cc 3 gnd 9 desel 4 gnd 10 gnd 5 powc 11 gnd 6 gnd 12 de pin no. symbol pin no. symbol 1v ddb 7 aca 2v ddb 8brtc 3v ddb 9brth 4 gndb 10 brtl 5 gndb 11 n.c. 6 gndb
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